- AMD introduced Helion, a reference 21-inch rack design supporting up to 32,768 Zen 6 processor cores.
- The company showcased the EPYC Verano CPU with 192 Zen 6 / Zen 6c cores and high-efficiency LPDDR5X memory support.
- Targeted at autonomous AI agents, the platforms and Verano processors are scheduled to arrive in the server market next half-year.
Massive Density: The Helion Reference Rack for Autonomous AI
AMD has expanded its enterprise data center roadmap with the announcement of the Helion reference rack design. Built around a standardized 21-inch form factor, Helion complements the Helios rack introduced by AMD at the OCP Global Summit last year. The architecture is explicitly engineered to handle high-density computing loads required by autonomous AI agent ecosystems.
In a CPU-only deployment, the Helion rack can pack an astonishing 32,768 Zen 6 compute cores. This unprecedented concentration of compute resources is made possible through the dense packaging of 256-core EPYC 9996 Venice server processors.
| Product / Architecture | Core Count | Key Highlights & Memory | Availability |
|---|---|---|---|
| AMD Helion Rack | Up to 32,768 (Zen 6) | 21-inch standard, EPYC 9996 Venice chips | — |
| EPYC Verano CPU | 192 (Zen 6 / Zen 6c) | Energy-efficient LPDDR5X support | Next half-year |
Unexpected Jump: 192-Core EPYC Verano with LPDDR5X
Alongside the massive rack architecture, AMD revealed surprising specifications for its upcoming EPYC Verano processors based on the Zen 6 (or Zen 6c) microarchitecture. While prior expectations pointed toward a 72-core ceiling, Verano will feature an impressive 192 cores.
To optimize thermal and electrical efficiency, Verano leverages power-saving LPDDR5X memory. Adopting this standard necessitates specialized motherboard designs tailored to the platform. AMD expects these processors to officially launch in the enterprise server ecosystem in the coming half-year.
Such massive CPU core counts offer ideal infrastructure support for emerging enterprise software stacks, including agentic workflow models that demand scalable multi-threaded execution within modern cloud environments.
Enterprise data centers will gain unprecedented compute density per rack footprint. Integrating 256-core EPYC Venice units with power-efficient 192-core LPDDR5X Verano nodes allows operators to run demanding autonomous AI workloads at scale while keeping energy overhead under control.
The jump to 192 cores with LPDDR5X on Verano is wild, especially for memory-bound agentic workloads. How do you think the bandwidth of soldered LPDDR5X will hold up across that many cores compared to standard multi-channel DDR5? Curious if thermal throttling becomes the bottleneck here.